PLC-LadderEvery standard FBD symbol explained pin by pin: AND, OR, NOT, TON, TOF, TP, CTU, CTD, R_TRIG, SR/RS, MOVE with EN/ENO and comparators — with ST equivalents.
Function block diagram symbols are the vocabulary of FBD: learn roughly fifteen standard blocks and you can read 90% of the FBD programs running in industry, on any brand of PLC. This page is the reference — every standard IEC 61131-3 block, its pins, its behaviour, and the one-line Structured Text equivalent so you can verify your reading. Bookmark it; the deep explanations live in the linked posts, and every block here can be dropped onto a canvas and tested in the free simulator.
(Each block below is a spot for a simulator screenshot of the symbol.)
How to Read Any FBD Symbol
Every block follows the same anatomy: type name top center (TON, AND, CTU), instance name above the box for stateful blocks, inputs on the left edge, outputs on the right, and a small negation circle on any BOOL pin that's inverted. Signals flow left to right. If this notation is new, start with the complete FBD tutorial and come back.
Two families matter: functions (no memory — same inputs, same output, no instance name) and function blocks (internal state between scans — instance name required, one instance per job).
Logic Function Symbols: AND, OR, NOT, XOR
| Block | Pins | Behaviour | ST equivalent |
|---|---|---|---|
AND (Siemens: &) |
2+ BOOL in → 1 BOOL out | TRUE when every input is TRUE | Q := A AND B; |
OR (Siemens: >=1) |
2+ BOOL in → 1 BOOL out | TRUE when any input is TRUE | Q := A OR B; |
| NOT | 1 in → 1 out | Inverts; usually drawn as a negation circle on a pin instead | Q := NOT A; |
XOR (=2k+1) |
2 BOOL in → 1 out | TRUE when inputs differ | Q := A XOR B; |
Most editors let you stretch AND/OR to extra pins — a five-input AND is one block, not a cascade.
Timer Symbols: TON, TOF, TP
All three share the same four pins: IN (BOOL, the condition), PT (TIME, preset like T#5s), Q (BOOL, result), ET (TIME, elapsed). The difference is how Q follows IN:
- TON (on-delay): Q turns TRUE after IN has been TRUE for PT. Drops instantly with IN. Delayed starts, debounce.
- TOF (off-delay): Q follows IN up instantly, hangs on for PT after IN drops. Fan run-on.
- TP (pulse): one fixed PT-long pulse per rising edge of IN, regardless of how long IN is held.
Full timing diagrams and the two classic timer bugs are in PLC Timers Explained.
Counter Symbols: CTU, CTD, CTUD
CTU: CU (count input, rising edge), RESET (level — holds CV at 0), PV (INT preset) → Q (TRUE when CV ≥ PV), CV (current count). CTD mirrors it downward with CD, LD (load PV into CV) → Q at zero. CTUD combines both with QU/QD. ST call: Batch(CU := Edge.Q, RESET := Rst, PV := 24);
The counting-on-levels trap and why CU almost always needs an edge block in front of it: PLC Counters Explained.
Edge Detection Symbols: R_TRIG, F_TRIG
The smallest useful function blocks. CLK in, Q out; Q is TRUE for exactly one scan when CLK rises (R_TRIG) or falls (F_TRIG). They convert a level into an event — put one in front of any logic that must happen once per press, once per part, once per start. Ladder's |P| / |N| contacts and Rockwell's ONS are the same idea in rung clothing.
Latch Symbols: SR and RS
Both have SET1/S1 and RESET/R1 (naming varies slightly by vendor) and output Q1. The name tells you who wins when both inputs are TRUE: SR is set-dominant (stays latched — right for alarms that must not clear while the cause persists), RS is reset-dominant (releases — right when safe-state is off). Choosing between them is the design decision; a worked alarm example is in FBD Programming Examples.
Comparator Symbols: GT, GE, EQ, NE, LE, LT
Functions, two numeric inputs → one BOOL. GT = greater than (A > B), GE = ≥, EQ = equality, NE = ≠, LE = ≤, LT = <. They're how analog values enter boolean logic — a GT watching a temperature feeds an SR to make an alarm with hysteresis. One caution: EQ on REAL values is fragile (floating-point rarely lands exactly); compare with GT/LT bands instead.
Math and Move Symbols: ADD, SUB, MUL, DIV, MOVE — and EN/ENO
Plain arithmetic functions: numeric ins, one out, chainable left to right for scaling math. MOVE copies its input to its output — FBD's assignment statement. On Siemens and Rockwell these blocks carry two extra pins: EN (execute this scan only if TRUE) and ENO (passes EN along, drops on a fault such as divide-by-zero). Chain ENO→EN down a math line and a broken input stops the chain instead of propagating garbage — the 4–20 mA scaling example in the FBD examples post shows the pattern.
Vendor Spelling Differences (Same Symbols, Different Accents)
The blocks above are IEC-standard; vendors dress them differently. Siemens TIA Portal labels gates & and >=1 and leans on EN/ENO; Rockwell Studio 5000 spells out instruction names (BAND/BOR in FBD routines, TONR-style timers with slightly different pin names); CODESYS follows the IEC text most literally. The anatomy — typed pins, left-in right-out, instance names on stateful blocks — never changes, which is why learning the standard set transfers across brands. (A deeper vendor comparison is coming in its own post.)
Learn Them by Wiring Them
Reading a symbol table teaches recognition; wiring blocks teaches fluency. Open the simulator, drop a TON between a switch and a lamp, negate a pin, swap SR for RS and watch who wins — each symbol takes about a minute to internalize once it's moving. Then read FBD Programming Examples: 8 Real Circuits to see these symbols combined into working machines, or step back to the FBD tutorial for execution order and network discipline.